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| 54VCXH162373 LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS s s s s s s s s s s s s s 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 3.3 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 4.5 ns (MAX.) at VCC = 2.3 to 2.7V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0V |IOH| = IOL = 8mA (MIN) at VCC = 2.3V 26 SERIE RESISTOR IN OUTPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 2.3V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES H162373 BUS HOLD PROVIDED ON DATA INPUTS LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V 100 Krad mil. 1019.6 (RHA QUAL) CONDITION A NO SEL, NO SEU UNDER 72 Mev/cm2/mg LET HEAVY IONS IRRADIATION PRODUCT UNDER QML-V QUALIFICATION FPC-48 These resistors permit to reduce line noise in high speed applications. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION DESCRIPTION The 54VCXH162373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 2.3 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. These 16 bit D-TYPE latches are bite controlled by two latch enable inputs (nLE) and two output enable inputs (OE). While the nLE input is held at a high level, the nQ outputs will follow the data input precisely. When the nLE is taken low, the nQ outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. The device circuits is including 26 series resistance in the outputs. July 2004 Rev. 1 1/13 54VCXH162373 Table 1: Ordering Codes FLYING MODEL PACKAGE SOLDER DIPPING QML-V FPC-48 FPC-48 (*) EM with 48 hours Burn-In QML-Q RHRXH162373K01Q RHRXH162373K02Q ENGINEERING MODEL RHRXH162373K1 RHRXH162373K2 (*) GOLD SOLDER RHRXH162373K01V RHRXH162373K02V Figure 1: Input And Output Equivalent Circuit Table 2: Pin Description PIN N 1 SYMBOL 1OE NAME AND FUNCTION Table 3: Truth Table INPUTS OE H L L L LE X L H H D X X L H OUTPUT Q Z NO CHANGE * L H 3 State Output Enable Input (Active LOW) 2, 3, 5, 6, 8, 9, 1Q0 to 1Q7 3-State Outputs 11, 12 13, 14, 16, 17, 2Q0 to 2Q7 3-State Outputs 19, 20, 22, 23 24 2OE 3 State Output Enable Input (Active LOW) 25 2LE Latch Enable Input 36, 35, 33, 32, 2D0 to 2D7 Data Inputs 30, 29, 27, 26 47, 46, 44, 43, 1D0 to 1D7 Data Inputs 41, 40, 38, 37 48 1LE Latch Enable Input 4, 10, 15, 21, GND Ground (0V) 28, 34, 39, 45 7, 18, 31, 42 VCC Positive Supply Voltage X : Don`t Care Z : High Impedance * : Q outputs are latched at the time when the LE input is taken low logic level. 2/13 54VCXH162373 Figure 2: IEC Logic Symbols Figure 3: Logic Diagram This logic diagram has not to be used to estimate propagation delays 3/13 54VCXH162373 Table 4: Absolute Maximum Ratings Symbol VCC VI VO VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage (OFF State) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current Parameter Value -0.5 to +4.6 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC + 0.5 - 50 - 50 50 100 400 -65 to +150 300 Unit V V V V mA mA mA mA mW C C ICC or IGND DC VCC or Ground Current per Supply Pin Power Dissipation PD Tstg TL Storage Temperature Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC Table 5: Recommended Operating Conditions Symbol VCC VI VO VO IOH, IOL IOH, IOL Top dt/dv Supply Voltage Input Voltage Output Voltage (OFF State) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.3 to 2.7V) Operating Temperature Input Rise and Fall Time (note 1) Parameter Value 2.3 to 3.6 -0.3 to 3.6 0 to 3.6 0 to VCC 12 8 -55 to 125 0 to 10 Unit V V V V mA mA C ns/V 1) VIN from 0.8V to 2V at VCC = 3.0V 4/13 54VCXH162373 Table 6: DC Specifications (2.7V < VCC < 3.6V unless otherwise specified) Test Condition Symbol Parameter VCC (V) 2.7 to 3.6 2.7 to 3.6 2.7 3.0 VOL Low Level Output Voltage 2.7 to 3.6 2.7 3.0 II II(HOLD) Input Leakage Current Input Hold Current 2.7 to 3.6 3.0 3.6 Ioff IOZ ICC ICC Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input 0 2.7 to 3.6 2.7 to 3.6 2.7 to 3.6 IO=-100 A IO=-6 mA IO=-8 mA IO=-12 mA IO=100 A IO=6 mA IO=8 mA IO=12 mA VI = VCC or GND VI = 0.8V VI = 2V VI = 0 to 3.6V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND VI or VO = VCC to 3.6V VIH = VCC - 0.6V 75 -75 500 10 10 20 20 750 A A A A A Value -55 to 125 C Min. 2.0 0.8 VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.55 0.8 5 A V V Max. V Unit VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 5/13 54VCXH162373 Table 7: DC Specifications (2.3V < VCC < 2.7V unless otherwise specified) Test Condition Symbol Parameter VCC (V) 2.3 to 2.7 2.3 to 2.7 2.3 VOL Low Level Output Voltage 2.3 to 2.7 2.3 II II(HOLD) Ioff IOZ ICC Input Leakage Current Input Hold Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current 2.3 to 2.7 2.3 0 2.3 to 2.7 2.3 to 2.7 IO=-100 A IO=-4 mA IO=-6 mA IO=-8 mA IO=100 A IO=6 mA IO=8 mA VI = 0 to 3.6V VI = 0.7V VI = 1.7V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND VI or VO = VCC to 3.6V 45 -45 10 10 20 20 Value -55 to 125 C Min. 1.6 0.7 VCC-0.2 2.0 1.8 1.7 0.2 0.4 0.6 5 A A A A A V V Max. V Unit VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Table 8: Dynamic Switching Characteristics (Ta = 25C, Input tr = tf = 2.0ns, CL = 30pF, RL = 500) Test Condition Symbol Parameter VCC (V) 2.5 3.3 2.5 3.3 2.5 3.3 VIL = 0V VIH = VCC VIL = 0V VIH = VCC VIL = 0V VIH = VCC Value TA = 25 C Min. Typ. 0.25 0.35 -0.25 -0.35 2.05 2.65 Max. V V V Unit VOLP VOLV VOHV Dynamic Low Voltage Quiet Output (note 1, 3) Dynamic Low Voltage Quiet Output (note 1, 3) Dynamic High Voltage Quiet Output (note 2, 3) 1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state. 2) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the HIGH state. 3) Parameters guaranteed by design. 6/13 54VCXH162373 Table 4: AC Electrical Characteristics (CL = 30pF, RL = 500, Input tr = tf = 2.0ns) Test Condition Symbol Parameter VCC (V) 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 Value -55 to 125 C Min. 1.0 0.8 1.0 0.8 1.0 0.8 1.0 0.8 1.0 1.0 1.5 1.5 1.5 1.5 Max. 5.2 4.0 5.7 4.2 6.2 4.7 5.1 4.8 ns ns ns ns ns ns ns 0.5 0.5 ns Unit tPLH tPHL tPLH tPHL tPZL tPZH tPLZ tPHZ ts th tw tOSLH tOSHL Propagation Delay Time Dn to Qn Propagation Delay Time LE to Qn Output Enable Time Output Disable Time Setup TIme, HIGH or LOW level Dn to LE Hold Time High or LOW level Dn to LE LE Pulse Width, HIGH Output To Output Skew Time (note1, 2) 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design Table 9: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) 2.5 or 3.3 2.5 or 3.3 2.5 or 3.3 VIN = 0 or VCC VIN = 0 or VCC fIN = 10MHz VIN = 0 or VCC Value TA = 25 C Min. Typ. 6 7 20 Max. pF pF pF Unit CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit) 7/13 54VCXH162373 Figure 5: Test Circuit TEST tPLH, tPHL tPZL, tPLZ (VCC = 3.0 to 3.6V) tPZL, tPLZ (VCC = 2.3 to 2.7V) tPZH, tPHZ CL = 30 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50) SWITCH Open 6V 2VCC GND Table 10: Waveform Symbol Values VCC 3.0 to3.6V VIH VM VX VY 2.7V 1.5V VOL + 0.3V VOH - 0.3V 2.3 to 2.7V VCC VCC/2 VOL + 0.15V VOH - 0.15V Symbol 8/13 54VCXH162373 Figure 6: WAveform - LE TO Qn Propagation Delays, Le Minimum Pulse Width, Dn To Le Setup And Hold Times (f=1MHz; 50% duty cycle) Figure 7: Waveform 2: Output Enable And Disable Time (f=1MHz; 50% duty cycle) 9/13 54VCXH162373 Figure 8: Waveform - Propagation Delay Time (f=1MHz; 50% duty cycle) 10/13 54VCXH162373 FPC-48 (MIL-STD-1835) MECHANICAL DATA mm. DIM. MIN. A b c D E E2 e L Q S1 0.66 0.13 2.18 0.254 0.15 15.75 9.65 6.35 0.635 8.38 1.14 0.026 0.005 TYP MAX. 2.72 MIN. 0.086 0.010 0.006 0.620 0.380 0.250 0.025 0.330 0.045 TYP. MAX. 0.107 inch 7330585A 11/13 54VCXH162373 Table 11: Revision History Date 09-Jul-2004 Revision 1 First Release Description of Changes 12/13 54VCXH162373 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 13/13 |
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